发明名称
摘要 First and second gate electrode layers that are positioned in a first conductive layer, first and second drain-drain contact layers that are positioned in a second conductive layer, and first and second drain-gate contact layers that are positioned in a third conductive layer together form conductive layers for a flip-flop. A sub word line extends in the X-axis direction in the first conductive layer. A VDD wire is disposed extending in the X-axis direction in the second conductive layer. A main word line is disposed extending in the X-axis direction in the third conductive layer. A bit line, a bit line/, a VSS wire, and a VDD wire are disposed extending in the Y-axis direction in the fourth conductive layer.
申请公布号 JP3637826(B2) 申请公布日期 2005.04.13
申请号 JP20000012457 申请日期 2000.01.21
申请人 发明人
分类号 H01L27/11;G11C11/412;H01L21/8244 主分类号 H01L27/11
代理机构 代理人
主权项
地址