Multiple clock zone CPU each zone having a clock controller adjusting the frequency according to a zone power signal and adjustments from other zones

摘要

A central processing unit CPU that includes multiple clock zones is disclosed. Each zone has a power supply voltage sensor, a clock generator for providing a variable frequency clock and a clock controller. The controller controls the frequency of the clock generator in response to power signals from the power supply voltage sensor and frequency adjustments signals from the other zones. The controller may communicate adjustments of the operating frequency due to the power signal to the other clock zones, the communication taking at least one cycle. The controller may use the adjustments from another zone to drive a phase misalignment between the zones. The controller then may drive the frequency misalignment to zero after driving the phase misalignment to zero. The controller may not communicate an adjustment of an operating frequency in it's clock zone, when in a immediately previous clock cycle, the controller has received a frequency adjustment from another clock zone.