Programmable logic device architecture based on arrays of LUT-based Boolean terms

摘要

Multiple product terms (PTs) are combined with a multiple-input look-up table (LUT) to form a LUT-based Boolean term (LBT) that generates a Boolean output. Multiple LBTs are combined with one or more sum terms to form an enhanced generic logic block (EGLB) that can be programmed to operate, e.g., as a sum-of-products structure, where the EGLB structure can be repeated within a programmable logic device (PLD). Different multi-bit Boolean functions can be implemented in a single pass through each EGLB, with fewer resources then prior art structures. Multiple LBTs can be combined with other logic to form combined LBTs (CLBTs). This invention can provide improved Boolean function packing density compared to existing PLD architectures and/or shorter delays for a comparable packing density.