发明名称 |
Selective epitaxy to improve silicidation |
摘要 |
A transistor architecture utilizes a raised source and drain region to reduce the adverse affects of germanium on silicide regions. Epitaxial growth can form a silicide region above the source and drain. The protocol can utilize any number of silicidation processes. The protocol allows better silicidation in SMOS devices.
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申请公布号 |
US6878592(B1) |
申请公布日期 |
2005.04.12 |
申请号 |
US20030341772 |
申请日期 |
2003.01.14 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
BESSER PAUL R.;NGO MINH V.;XIANG QI;PATON ERIC N. |
分类号 |
H01L21/20;H01L21/285;H01L21/336;H01L29/51;(IPC1-7):H01L21/336;H01L21/320;H01L21/44 |
主分类号 |
H01L21/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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