发明名称 MEDIA ACCESS CONTROLLER WITH POWER-SAVE MODE
摘要 There is provided a media access controller with a power-save mode. Particularly, the media access controller of the present invention minimizes power loss by disabling clocks applied to all blocks, including CPU, of the media access controller during the power-save mode. The media access controller of the present invention includes: a power-save master for securing stable transmission/reception of data through bus by respective processors contained in the controller; a wake-up timer for noticing that the power-save mode is expired; a power control unit for determining whether to supply a power to a phase-locked loop, and a timing when clocks for the media access controller are applied and disabled; and a locktime register for storing a locktime when an output of the phase-locked loop is settled. Additionally, there is provided a method of efficiently changing the media access controller from the active mode to the power-save mode, and vice versa.
申请公布号 KR100481873(B1) 申请公布日期 2005.04.11
申请号 KR20030006876 申请日期 2003.02.04
申请人 发明人
分类号 G06F1/32;H04L12/10;G06F1/26;H04B7/005;H04L12/28;H04L29/00;H04W52/28;H04W52/54 主分类号 G06F1/32
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