发明名称 SEMICONDUCTOR DEVICE MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To reduce the gate electrode depletion layer, and to decrease the threshold voltage absolute value. SOLUTION: A channel region is positioned in the surface layer of a silicon substrate 1 and is sandwiched in between N-type source/drain regions 31. A gate insulating film 21, which is a positive charge containing HfO<SB>2</SB>film, is formed directly on the channel region. A metal gate electrode 41, which is a metal film having the Fermi level equivalent to that of the channel region, is formed on the insulating gate 21. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005093815(A) 申请公布日期 2005.04.07
申请号 JP20030326583 申请日期 2003.09.18
申请人 SEMICONDUCTOR LEADING EDGE TECHNOLOGIES INC 发明人 HAYASHI KIYOSHI
分类号 H01L27/092;H01L21/8238;H01L29/78;(IPC1-7):H01L29/78;H01L21/823 主分类号 H01L27/092
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