发明名称 Semiconductor memory device
摘要 With the objective of providing a semiconductor memory device which is made identical in usability to a static RAM by use of dynamic memory cells and realizes a high-speed memory cycle time, there is provided a pseudo static RAM having a time multiplex mode which, when instructions for a memory operation for reading memory information from each of memory cells each requiring a refresh operation for periodically holding the memory information, or writing the same therein is issued, carries out an addressing-based autonomous refresh operation different from the memory operation before or after the memory operation. The pseudo static RAM includes address signal transition detectors for a row and a column, and a page mode which independently performs a column address selecting operation according to an address signal transition detect signal of the second address signal transition detector.
申请公布号 US2005073895(A1) 申请公布日期 2005.04.07
申请号 US20030636558 申请日期 2003.08.08
申请人 发明人 YAHATA HIDEHARU;HORIGUCHI MASASHI;SAITOH YOSHIKAZU;KAWASE YASUSHI
分类号 G11C11/403;G11C7/00;G11C11/34;G11C11/401;G11C11/406;(IPC1-7):G11C7/00 主分类号 G11C11/403
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