发明名称 Circuit design method using high level synthesis, involves dividing the circuit diagram into a number of syntactic and semantic elements and assigning classes to each element from a hierarchical class structure
摘要 <p>The method involves dividing the circuit diagram into a number of syntactic and semantic elements, in particular expressions, declarations, instructions and types. The individual elements are identified with corresponding classes from a hierarchical class structure, and their individual class synthesis information is assigned. An object-oriented data structure is produced for the circuit diagram through instantiation of the classes from the class structure, with the individual syntactic and semantic elements identified. A circuit implementation is produced from the object-oriented data structure. An independent claim is included for a device for circuit design using high level synthesis.</p>
申请公布号 DE10338964(A1) 申请公布日期 2005.04.07
申请号 DE2003138964 申请日期 2003.08.25
申请人 KURATORIUM OFFIS E.V. 发明人 GRIMPE, EIKE
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址