PHASE CONJUGATE CIRCUIT

摘要

A phase conjugate circuit is disclosed for deriving phase conjugation information from a main input signal of a given frequency comprising: an input receiving a reference input signal; at least one phase locked loop circuit comprising an oscillator having a main output signal, an input receiving a PLL input signal, an input receiving a feedback signal from the oscillator and at least one phase detecting means, wherein the phase detection means detects any phase difference between the PLL input is signal and the feedback signal and provides a phase control signal to the oscillator. In one embodiment, the main input signal is mixed with the main output signal to provide the feedback signal and the reference signal is the PLL input signal. In an alternative embodiment, the reference signal is mixed with the main output signal to produce the feedback signal and the main input signal is the PLL input signal. In a further alternative embodiment, the main input signal is mixed with the reference signal to provide the PLL input signal and the main output signal is the feedback signal.