发明名称 REFRESH RATE ADJUSTMENT
摘要 <p>The present invention is a random access memory device assembled into a chip package with a refresh request control circuit, and a method for using the same. The refresh request control circuit includes a first circuit configured to receive a first refresh rate signal with a first refresh rate signal frequency. The first circuit produces a second refresh rate signal with a second refresh rate signal frequency. The refresh request control circuit also includes a second circuit configured to receive the first refresh rate signal and the second refresh rate signal. The refresh request control circuit also includes a final fusing element coupled to the second circuit. The final fusing element selects a final refresh rate signal. The selection of the final refresh rate signal occurs after the random access memory device is assembled into a chip package.</p>
申请公布号 WO2005031749(A1) 申请公布日期 2005.04.07
申请号 WO2004EP10577 申请日期 2004.09.21
申请人 OH, JONG-HOON;INFINEON TECHNOLOGIES AG 发明人 OH, JONG-HOON
分类号 G11C7/10;G11C11/406;(IPC1-7):G11C11/406 主分类号 G11C7/10
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