| 摘要 |
A method of fabricating a control gate of a flash memory device is provided to restrain generation of peak from the control gate and suppress leakage current of cells by preventing a defective of a lateral profile of the control gate. A tunnel oxide layer, a floating gate(102), and a dielectric layer(106,108) are sequentially stacked on a flash memory cell region of a semiconductor substrate(100). A first spacer(110) is formed on each sidewall of the dielectric layer, the floating gate, and the tunnel oxide layer. A conductive layer and an insulating layer are formed on the entire surface of the semiconductor substrate. A second spacer(114a) is formed to leave the insulating layer only on the sidewall of the conductive layer of the flash memory cell region by etching the insulating layer. A control mask pattern is formed on the conductive layer of the flash memory cell region. A control gate surrounding the floating gate is formed by patterning the conductive layer. The mask pattern is removed therefrom.
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