| 摘要 |
In order to establish boundary current levels (IL, IM, IH) for more than two memory states, a circuit is provided that uses reference currents (I R00, IR01, IR10, IR11) defining the center of each state. The reference currents are defined by multiple pre- programmed reference memory cells (21) or by a single reference memory cell (21, "11") together with a current mirror (37) that sets the other reference currents at specified proportions of a first reference (I R11). With these reference currents, an analog circuit block (53) generates fractional currents at (1-m) and m of the reference currents, where m is a specified margin value equal to 50% for read operations and less than 50% for program verify operations, then combines fractional currents for adjacent states to produce the boundary current level. The fractional currents ((1-m)IRi, (m)IRj) may be obtained with pairs of current mirrors (73, 74) biased by sense amplifiers (71, 72) for the various reference currents.
|
