| 摘要 |
A device for detecting failure of a field effect transistor (FET) includes a first FET1 connected in series with a motor M between a power source terminal and ground, a motor control unit 11 for on/off controlling a voltage to be applied to said motor to set normal/reverse operation and stopping of said motor, a gate control unit for on/off controlling a gate voltage to be applied to said FET to control driving of said motor, a voltage applying means VB, R1 for applying a positive voltage at a prescribed voltage level to the current input terminal of the FET; a voltage detecting unit CMP1 for detecting the voltage level of the positive voltage thus applied when said gate voltage is off; and a failure detecting unit 14 for detecting short-circuiting failure of the FET on the basis of a change in the voltage level detected by said voltage detecting unit when said gate voltage is off while said motor stops. In this configuration, failure of the FET for controlling driving of the motor can be detected both when the motor stops and operates.
|
