发明名称 Chip scale package with heat dissipating part
摘要 In a chip scale package, a chip is mounted in a cavity formed in a leadframe. The leadframe includes a plurality of leads that radiate from a heat dissipating part located in the cavity. Each lead extends from a thinner portion of inner lead in the cavity to a thicker portion of outer lead outside the cavity. The chip includes a plurality of bonding pads on which is respectively formed a layer of connecting material. The chip is attached on the heat dissipating material, and via the layer of connecting material, is electrically connected to the inner leads by thermal pressing. Via molding, the chip is encapsulated in the leadframe. The achieved package has a dimensional size that is approximately equal to that of the leadframe with an improved thermal dissipation.
申请公布号 US6876087(B2) 申请公布日期 2005.04.05
申请号 US20030248714 申请日期 2003.02.12
申请人 VIA TECHNOLOGIES, INC. 发明人 HO KWUN-YAO;KUNG MORISS
分类号 H01L23/31;H01L23/495;(IPC1-7):H01L23/495;H01L23/48 主分类号 H01L23/31
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