Voltage level alteration circuit with two transistorized circuits connected together has first and second nMOSTs with connections to pMOSTs in first circuit and similar arrangement in second circuit

摘要

High and low level logic signals may be created. The voltage level altering circuit (10) has two separate signal altering modules (14,16) connected between terminals (38,40) for high (VDD) and low (VSS) signal voltages. A transistor (26) has a first control terminal (26c) and is connected to a first transistorized circuit with first and second nMOSTs (18,20) with connections to pMOSTs (22,24). The second signal altering module is inverted with respect to the first. A control transistor (36) is connected to the second transistorized circuit with first and second pMOSTs (28,30) with connections to nMOSTs (22,24).