摘要 |
1,134,438. Frequency discriminators. SOC. NATIONALE D'ETUDE ET DE CONSTRUCTION DE MOTEURS D'AVIATION. 11 Nov., 1966 [12 Nov., 1965], No. 50739/66. Heading H3A. A pair of circuits as shown in Fig. 1 produce output square waves in anti-phase and of amplitude proportional to the period of an input signal (i.e. inversely proportional to the frequency), the two square waves being combined to provide a D.C. output voltage. For the first quarter-cycle of an input signal (0 to T/2, Fig. 2, not shown), transistor 6 conducts and discharges capacitor 1; in the next quarter-cycle (T/2 to T) the capacitor 1 charges through diode 4 from a constant current source, which may be a high resistance, to a potential proportional to the charging time; in the next half-cycle transistor 5 conducts to prevent further charging of the capacitor 1, and transistor 7 conducts to connect the constant potential on capacitor 1 to an output terminal 8. The switching signals applied to terminals 9-11 are derived from an input square-wave signal X (Figs. 7 and 8, not shown), and its inverse #X and from derived signals Y and #Y of half the frequency by means of an AND circuit (17, Fig. 7) and an OR circuit (19). The signals supplied are Y + X Y to terminals 9, #X#Y to terminal 10, and Y to terminal 11, and the corresponding anti-phase signals to the anti-phase unit corresponding to Fig. 1. |