发明名称 Packet communication apparatus
摘要 A packet communication apparatus, which includes a CPU, a memory, and a packet communication circuit, acts as an interface between a network-connected controlled object and a network terminal that remotely monitors and controls the controlled object, and transmits and receives a packet between the controlled object and the network terminal, further includes a copy and operation unit that is a hardware unit for executing the checksum calculation to check for a packet error and the copy operation. The copy and operation unit performs the packet data copy operation and the checksum calculation simultaneously between a sending buffer/receiving buffer, formed in the memory and used by the packet communication circuit, and a work area used by a communication processing program, thus reducing the load of the CPU and increasing the communication processing speed.
申请公布号 US2005068897(A1) 申请公布日期 2005.03.31
申请号 US20040921879 申请日期 2004.08.20
申请人 RENESAS TECHNOLOGY CORP. 发明人 ARITA HIROSHI;NAKATSUKA YASUHIRO;SHIMAMURA KOTARO;WATANABE YASUWO
分类号 H04L12/56;H04L1/00;H04L29/06;H04M11/00;(IPC1-7):H04L1/00 主分类号 H04L12/56
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