发明名称 METHOD OF FORMING VIA HOLE IN COMPOUND SEMICONDUCTOR
摘要 PROBLEM TO BE SOLVED: To provide a method of forming a via hole in a compound semiconductor which can improve the efficiency of processes and can reduce parasitic impedance, at a low cost with little influence on the environment and hence can make available the formation of a Hall element, capable of detailed reading of magnetic domains of a test piece. SOLUTION: Using a super-hard alloy drill having a very small diameter or a diamond drill, a via hole 3 is formed through the compound semiconductor. Then, a conductive path is established between the front and rear faces of the compound semiconductor through film formation 6, etc., by plating or vacuum evaporation on the surface of the via hole 3. By this method of forming a via hole, the via hole 3 can be formed mechanically and easily in a compound semiconductor substrate 1. Moreover, this method can make the via hole 3 into a conductor by the film formation 6, etc., by plating or vacuum evaporation at a low cost with little load on the environment, making available the formation of a rear face electrode device with reduced parasitic impedance. As a result, through elimination of bonding wires and improvements in characteristics by the reduced parasitic impedance, a Hall element capable of detailed reading of magnetic domains of a test piece which will be used for a scanning type Hall probe microscope is obtained. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005085926(A) 申请公布日期 2005.03.31
申请号 JP20030315214 申请日期 2003.09.08
申请人 JAPAN SCIENCE & TECHNOLOGY AGENCY 发明人 ADARSH SANDHU
分类号 H01L43/04;H01L43/06;(IPC1-7):H01L43/04 主分类号 H01L43/04
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