发明名称 Layout structure of fuse bank of semiconductor memory device for reducing the size of fuse bank
摘要 <p>A fuse bank of a semiconductor memory device is provided. The fuse bank includes first and second laser fuses. The first laser fuse includes a first laser fusing region disposed in a first direction, a first connecting line region bent in a second direction, and a second connecting line region bent in a third direction. The second laser fuse includes a second laser fusing region disposed in the first direction, a third connecting line region bent in the second direction, and a fourth connecting line region bent in the third direction. The first laser fuse and the second laser fuse have a space of a predetermined distance there between. The first and second laser fusing regions form a laser fusing region of the fuse bank, and the first and second laser fuse are disposed on a plane. The fuse bank is embodied on a single layer.</p>
申请公布号 KR100480614(B1) 申请公布日期 2005.03.31
申请号 KR20020050836 申请日期 2002.08.27
申请人 发明人
分类号 G11C29/00;H01L23/525;(IPC1-7):G11C29/00 主分类号 G11C29/00
代理机构 代理人
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