发明名称 |
Stress compensation layer systems for improved second level solder joint reliability |
摘要 |
According to one aspect of the present invention, an electronic assembly and a method of forming an electronic assembly are provided. A semiconductor package includes a package substrate with a microelectronic die mounted to a first side and contact formations attached to a second side thereof. A stress compensation layer is formed on the first surface between the contact formations. The semiconductor package is then attached to a circuit board leaving an air space between the stress compensation layer and the circuit board. The stress compensation layer reduces stress on the contact formations and increases solder joint reliability. |
申请公布号 |
US2005068757(A1) |
申请公布日期 |
2005.03.31 |
申请号 |
US20030676548 |
申请日期 |
2003.09.30 |
申请人 |
JAYARAMAN SAIKUMAR;STERRETT TERRY;GETTINGER CONNIE;WAKHARKAR VIJAY;PADOVANI AGNES |
发明人 |
JAYARAMAN SAIKUMAR;STERRETT TERRY;GETTINGER CONNIE;WAKHARKAR VIJAY;PADOVANI AGNES |
分类号 |
H01L23/498;H05K1/02;H05K3/34;(IPC1-7):H05K1/11;H05K1/14 |
主分类号 |
H01L23/498 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|