发明名称 Clock recovery circuit
摘要 A feed-forward controlled phase difference detector for detecting a phase difference using the output of a comparator included in an analog-to-digital converter, for example, is combined with a known digital feedback controlled phase difference detector for recovering a clock signal. The feed-forward controlled phase difference detector has its loop gain controlled adaptively. By utilizing these two types of phase difference detectors, a clock recovery circuit for recovering a clock signal synchronized to the data read out from a storage medium, for example, can operate faster and more stably.
申请公布号 US6873668(B2) 申请公布日期 2005.03.29
申请号 US20010899231 申请日期 2001.07.06
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 YAMAMOTO TAKASHI;OKAMOTO KOUJI
分类号 H04N5/91;G11B20/14;H03L7/107;H04L7/033;H04L27/00;H04L27/06;(IPC1-7):H03D3/24 主分类号 H04N5/91
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