发明名称 Method and apparatus for reducing cache thrashing
摘要 A method and apparatus are disclosed for adaptively decreasing cache thrashing in a cache memory device. Cache performance is improved by automatically detecting thrashing of a set and then providing one or more augmentation frames as additional cache space. In one embodiment, the augmentation frames are obtained by mapping the blocks that map to a thrashed set to one or more additional, less utilized sets. The disclosed cache thrashing reduction system initially identifies a set that is likely to be experiencing thrashing, referred to herein as a thrashed set. Once thrashing is detected, the cache thrashing reduction system selects one or more additional sets to augment a thrashed set, referred to herein as the augmentation sets. In this manner, blocks of main memory that are mapped to a thrashed set are now mapped to an expanded group of sets (the thrashed set and the augmentation sets). Finally, when the augmentation sets are no longer likely to be needed to decrease thrashing, the augmentation set(s) are disassociated from the thrashed set(s).
申请公布号 US6874056(B2) 申请公布日期 2005.03.29
申请号 US20010975762 申请日期 2001.10.09
申请人 AGERE SYSTEMS INC. 发明人 DWYER HARRY;FERNANDO JOHN SUSANTHA
分类号 G06F12/12;(IPC1-7):G06F12/00 主分类号 G06F12/12
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