发明名称 |
FIFO MEMORY CONTROLLER AND CONTROLLING METHOD OF FIFO MEMORY DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To reduce software process load by dispensing with access for one-bite unit in data access with arbitrary size of an FIFO memory. SOLUTION: This FIFO memory controller comprises a size specifying means 106 capable of setting software specifying an access bus width for the FIFO memory 104, and an external interface means 107 for controlling the access data width to the FIFO memory according the access bus width. COPYRIGHT: (C)2005,JPO&NCIPI
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申请公布号 |
JP2005078483(A) |
申请公布日期 |
2005.03.24 |
申请号 |
JP20030309903 |
申请日期 |
2003.09.02 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
IMAKURUSU NAOTAKA;OCHIAI NARIYUKI |
分类号 |
G06F5/06;(IPC1-7):G06F5/06 |
主分类号 |
G06F5/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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