发明名称 |
Pulse output circuit, shift register and electronic equipment |
摘要 |
A driver circuit of a display device, which includes TFTs of a single conductivity type and outputs an output signal with normal amplitude. A pulse is inputted to TFTs 101 and 104 to turn ON the TFTs and a potential of a node alpha is raised. When the potential of the node alpha reaches (VDD-VthN), the node alpha becomes in a floating state. Accordingly, a TFT 105 is turned ON and a potential of an output node is raised as a clock signal becomes High level. On the other hand, a potential of a gate electrode of the TFT 105 is further raised due to an operation of a capacitance means 107 as the potential of the output node is raised, so that the potential of the gate electrode of the TFT 105 becomes higher than (VDD+VthN). Thus, the potential of the output node is raised to VDD without causing a voltage drop due to a threshold voltage of the TFT 105. An output at the subsequent stage is then inputted to a TFT 103 to turn the TFT 103 ON, while the potential of the node alpha of TFTs 102 and 106 is dropped to turn the TFT 105 OFF. As a result, the potential of the output node becomes Low level.
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申请公布号 |
US2005062515(A1) |
申请公布日期 |
2005.03.24 |
申请号 |
US20040958568 |
申请日期 |
2004.10.06 |
申请人 |
SEMICONDUCTOR ENERGY LABORATORY CO., LTD., A JAPAN CORPORATION |
发明人 |
NAGAO SHOU;TANADA YOSHIFUMI;SHIONOIRI YUTAKA;MIYAKE HIROYUKI |
分类号 |
G02F1/1345;G02F1/133;G02F1/1368;G06F1/04;G09G3/20;G09G3/36;G11C19/00;G11C19/28;H01L51/50;H03K3/013;H03K3/353;H03K17/00;H03K17/693;H03K19/0175;H03L5/00;H05B33/14;(IPC1-7):H03L5/00 |
主分类号 |
G02F1/1345 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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