| 摘要 |
PROBLEM TO BE SOLVED: To obtain an FSK demodulator circuit with a simpler circuit constitution. SOLUTION: The demodulator circuit 10 for demodulating an FSK signal composed of a long bit with a long bit period and a short bit with a short bit period includes a bit boundary detecting part 12 for detecting the bit boundary timing of each bit, and a bit determination part 14 for determining that each bit is a long bit when a threshold period passes from the bit boundary timing of a start edge till the bit boundary timing of an end edge and determining that each bit is a short bit when the threshold period does not pass. COPYRIGHT: (C)2005,JPO&NCIPI
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