发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device wherein layout of a large number of I/O cells is enabled in small area even when I/O cells with measures against plug-and-play and I/O cells without the measures are intermingled and double well structure is adopted to each of the I/O cells. SOLUTION: In the semiconductor device wherein the I/O cells (100c) without the measures against plug-and-play and the I/O cells (100a) with the measures against plug-and-play are intermingled, grouping of the I/O cells (100a) with the measures against plug-and-play is performed, and they are arranged. Deep n-type wells (T-Well) are subject to common configuration between the I/O cell (100a) to which grouping is performed. Deep n-type wells (T-Well) are formed being isolated from each other, regarding a part wherein the I/O cell (100a) with the measures against plug-and-play and the I/O cell (100c) without the measures are adjacent to each other. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005079221(A) 申请公布日期 2005.03.24
申请号 JP20030305737 申请日期 2003.08.29
申请人 RENESAS TECHNOLOGY CORP 发明人 MUTO TAKASHI
分类号 H01L21/822;H01L21/82;H01L27/04;(IPC1-7):H01L21/82 主分类号 H01L21/822
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