发明名称 INFORMATION PROCESSING DEVICE
摘要 <p>Internal data has positive expression data and negative expression data which are in the relationship of bit inversion to each other. Calculation devices for performing calculation in these expression formats are operated in parallel. The output of the result is selected at random and operation is performed so that one of the expression formats of positive expression data and the negative expression data is stored in an IC card. As the internal data, key data indicating the expression format and data are stored in pair. Moreover, it is verified whether the output result of the calculation device of each of the expression formats maintains the relationship of bit inversion. Thus, in an IC card, it is possible to reduce the association between the data processing in the IC card chip and the current consumption, thereby increasing the security. Moreover, when an attack is made to intentionally cause malfunction in the chip and acquire internal secret information by performing comparison with a normal operation, the malfunction is detected to prevent theft of the data.</p>
申请公布号 WO2005027403(A1) 申请公布日期 2005.03.24
申请号 WO2004JP10251 申请日期 2004.07.12
申请人 RENESAS TECHNOLOGY CORP.;KAMINAGA, MASAHIRO;ENDO, TAKASHI;WATANABE, TAKASHI 发明人 KAMINAGA, MASAHIRO;ENDO, TAKASHI;WATANABE, TAKASHI
分类号 G06F21/55;G06F21/75;G06F21/77;G06K19/073;H04L9/06;H04L9/10;(IPC1-7):H04L9/10 主分类号 G06F21/55
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