| 摘要 |
PROBLEM TO BE SOLVED: To solve the problem that gate resistance becomes large in proposition of a salicide block type MOS transistor in which a silicide layer is not formed in a gate electrode and a part of region near the gate electrode of an impurity diffused layer in order to increase ESD endurance, although technology which makes the gate resistance low is also proposed, complication of texture and layout design, etc. are generated. SOLUTION: Salicide block regions are prepared around gate electrodes 9, 17. In a plurality of portions, bond parts 23 of polysilicon which are extended from the gate electrodes 9, 17 to the outside of active regions 10, 11 are formed. By using contacts 41 formed in inactive regions, electrical connection to a gate electrode metal wiring 34 formed in an upper wiring is performed. COPYRIGHT: (C)2005,JPO&NCIPI
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