发明名称 SOI-MOSFET
摘要 PROBLEM TO BE SOLVED: To provide an SOI-MOSFET operating as a high driving current low parasitic capacitance with a low substrate bias coefficient by varying the substrate depletion layer capacitance when a variable threshold voltage CMOSFET is realized and the threshold voltage is increased by a high substrate bias coefficient during standby. SOLUTION: The SOI-MOSFET comprises a semiconductor substrate, an insulting layer formed on the surface of the semiconductor, a semiconductor layer having an element forming region and an isolation region formed on the surface of the insulating film, a channel part formed in the element forming region and diffused with first conductivity type impurities, a source-drain diffusion layer of second conductivity type impurities, and a gate electrode formed on the channel part through a gate insulating film wherein the substrate bias coefficient of the transistor is increased during standby and decreased during operation. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005079127(A) 申请公布日期 2005.03.24
申请号 JP20030209799 申请日期 2003.08.29
申请人 FOUNDATION FOR THE PROMOTION OF INDUSTRIAL SCIENCE 发明人 HIRAMOTO TOSHIRO;OFUJI TORU
分类号 H01L29/786;(IPC1-7):H01L29/786 主分类号 H01L29/786
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