发明名称 Control clocks generator and method thereof for a high speed sense amplifier
摘要 A control clocks generator and method thereof for a high speed sense amplifier generates control clocks by utilizing RC delay and gate delay, in combination with reference sensing delay induced from a reference sense amplifier, and thereby, is tracking well for the high speed sense amplifier with process, temperature and voltage variations.
申请公布号 US2005063240(A1) 申请公布日期 2005.03.24
申请号 US20040963573 申请日期 2004.10.14
申请人 LEE YU-WEI;HSU HSIAO-YANG 发明人 LEE YU-WEI;HSU HSIAO-YANG
分类号 G11C7/06;G11C7/08;(IPC1-7):G11C8/00 主分类号 G11C7/06
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