发明名称 Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias
摘要 A method for forming a conductive via in a semiconductor component is disclosed. The method includes providing a substrate having a first surface and an opposing, second surface. At least one hole is formed in the substrate extending between the first surface and the opposing, second surface. A seed layer is formed on a sidewall defining the at least one hole of the substrate and coated with a conductive layer, and a conductive or nonconductive filler material is introduced into the remaining space within the at least one hole. A method of forming a conductive via through a substrate using a blind hole is also disclosed. Semiconductor components and electronic systems having substrates including the conductive via of the present invention are also disclosed.
申请公布号 US2005064707(A1) 申请公布日期 2005.03.24
申请号 US20030668914 申请日期 2003.09.23
申请人 SINHA NISHANT 发明人 SINHA NISHANT
分类号 H01L21/768;H01L23/48;(IPC1-7):H01L21/00;H01L21/44 主分类号 H01L21/768
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