Fractional-r frequency synthesizer

摘要

A fractional-R synthesizer having a divider (406) with rational increments and configurable in rational steps able to generate a plurality of frequencies in rational increments from a reference frequency. The fractional-R synthesizer is included in the feedback loop of a PLL. Preferably a Delta-Sigma modulator (412) is responsive to an input representing a fractional value and clocked by the output of said divider (406) to produce an output signal that modulates the divide ratio of the variable rational divider (406).