发明名称 Integrated multilevel signal demultiplexor
摘要 An integrated circuit with a signal demultiplexor for separating out two signals of different magnitudes from within a multiplexed signal without requiring a large capacitance for signal filtering. A multiple-threshold input comparator stage separates the multiplexed input signal into a first fully demultiplexed signal and a first partially demultiplexed signal. The first fully and partially demultiplexed signals are logically processed in an Exclusive-OR gate to produce a second partially demultiplexed signal which is then time-delayed and gated by the first fully demultiplexed signal. The resultant gated signal is low pass filtered to produce a second fully demultiplexed signal. In a video signal application, the multiplexed input signal would be a "sandcastle" signal containing both horizontal clamp and vertical synchronization signals, with the horizontal clamp signal component being greater in magnitude than the vertical synchronization signal component, and the resulting first and second fully demultiplexed signals would be the separated horizontal clamp and vertical synchronization signals, respectively.
申请公布号 US6870569(B1) 申请公布日期 2005.03.22
申请号 US20010906433 申请日期 2001.07.16
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 HOJABRI PEYMAN
分类号 H04N5/10;H04N5/18;(IPC1-7):H04N11/04;H03H11/26 主分类号 H04N5/10
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