Semiconductor device verification system and method

摘要

A semiconductor device verification system and method isolates errors detected during verification by comparing a predetermined stimulus applied to the semiconductor device with an observed stimulus measured within the semiconductor device. If the predetermined stimulus differs from the observed stimulus, the error likely results from an inaccuracy in the verification process rather than a flaw of the semiconductor device. The observed stimulus is measured between the input circuit and the core of the semiconductor device, such as between the flip flop associated with an input pin and the logic core of a processor. An observed stimulus circuit integrated within the semiconductor device outputs the observed stimulus to an output pin for use by an error isolation engine associated with verification testing equipment.