| 摘要 |
A nonvolatile ferroelectric memory device having a multi-bit control function can store and sense multi-bit data in a ferroelectric memory cell. In the memory device, a plurality of cell array blocks generates a plurality of different sensing critical voltages in a reference timing strobe interval. As a result, in different time intervals, the plurality of sensing critical voltages are compared with a plurality of cell data sensing voltages applied from a main bitline. A data register array unit stores a plurality of cell data applied from the plurality of cell array blocks in response to a plurality of read lock signals activated at different timings in different time intervals, respectively. Therefore, the plurality of data bits can be stored in a cell.
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