| 摘要 |
A power-saving type parallel discrete cosine transform is provided to optimize the energy efficiency of discrete cosine transform operation by a discrete cosine transform operator using a linear array processing element, thereby extending working hours of a mobile device using limited battery capacity. A linear array of processing elements executes D=XC^T, wherein X indicates n x n matrix, C indicates coefficient matrix, and D indicates intermediate matrix. To complete two dimensional DCT operation, an expression Z=CD is calculated. Each processing element uses intermediate data stored at a data RAM(Read Access Memory) without receiving external input. |
