| 摘要 |
A reset generator circuit has an oscillator circuit and a delay circuit having a clock signal input, which is connected to an output of the oscillator circuit. The delay circuit can be activated by a control signal at a control input and is designed for outputting a first signal after a first time period and for outputting a second signal after a time period after the outputting of the first signal. The reset generator circuit comprises a generator circuit designed for outputting a reset signal in the event of detection of the first signal up to the detection of the second signal. Furthermore, the reset generator circuit contains a comparison device designed for a comparison of a supply potential with a potential threshold value and for outputting the control signal in the event of the potential threshold value being exceeded. The delay circuit and the generator circuit can be controlled by the comparison device.
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