NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

摘要

A nonvolatile semiconductor memory device is provided to improve the reliability of data retention characteristics by reducing the stress of voltage and current against an adjustable resistor of each non-selective memory cell during a reading and resetting operation. A memory cell(3) includes an adjustable resistor(1) connected with a source of a selective transistor(2) through one end and connected with a source line(SL) through the other end. A drain of the selective transistor is connected to a bit line(BL) prolonged along a column direction and a gate of the selective gate is connected to a word line(WL) prolonged along a row direction. A writing operation of the memory cell is electrically performed by a first predetermined voltage applied to a selected word line and a predetermined writing voltage or current applied between a selected bit and source line. A reset operation of the memory cell is electrically performed by a second predetermined voltage applied to the selected word line and a predetermined reset voltage or current applied between the selected bit and source lines.