发明名称 |
Device and method for detecting phase difference and PLL using the same |
摘要 |
A phase detector includes a first control unit and a second control unit to generate a first control pulse and a second control pulse representative of a phase difference between a reference signal and a first clock signal. The first control unit receives the reference signal and the first clock signal and generates the first control pulse. The first control pulse has a first pulse width that varies depending on the phase difference between the reference signal and the first clock signal. The second control unit receives the reference signal and a second clock signal and generates the second control pulse such that the second control pulse substantially overlaps the first control pulse and has a second pulse width that is a preset value. The second clock signal has a frequency higher than that of the first clock signal.
|
申请公布号 |
US2005057314(A1) |
申请公布日期 |
2005.03.17 |
申请号 |
US20040937295 |
申请日期 |
2004.09.10 |
申请人 |
HSU TSE-HSIANG;CHOU CHIA-HUA |
发明人 |
HSU TSE-HSIANG;CHOU CHIA-HUA |
分类号 |
H03L7/089;H03L7/091;(IPC1-7):H03L7/00 |
主分类号 |
H03L7/089 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|