发明名称 REAL TIME DATA SYNCHRONIZATION METHOD AND VARIABLE CLOCK GENERATOR CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a synchronization method of real time data which is realized by a small-scale apparatus without using PLL, and reduces the power consumption by making additional data such as time stamp unnecessary. <P>SOLUTION: When audio/visual data sampled by a first sampling clock C101 are transmitted from a first terminal 100 to a second terminal 109, the speed of the second sampling clock C102 of the second terminal 109 is controlled based on the data amount of encoded data or the number of frames of the encoded data or the data amount of decoded data of the second terminal 109, and thereby the second sampling clock is adjusted. After being converted to data of a fixed third sampling clock S103 through a sampling rate converter (SRC) 114, the audio/visual data are converted to analog data in a DA converter 115 . <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005073040(A) 申请公布日期 2005.03.17
申请号 JP20030301379 申请日期 2003.08.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MATSUKAWA KAZUO;HOSHIDA TAKUMI;NISHIO YUUKI;FUKUYA TETSUYA
分类号 H04L7/02 主分类号 H04L7/02
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