发明名称 PLL CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a PLL circuit in which stability and responsiveness are enhanced while ensuring low voltage operation and a wide oscillation range. <P>SOLUTION: An output signal of a phase comparator that received a frequency signal formed on the basis of an oscillation signal of a current controlled oscillator and a reference signal is made into DC by a loop filter, a first current included in a control current of the current controlled oscillator is formed by a voltage/current converter to configure a PLL, and a calibration circuit is provided to change a self-oscillation frequency of the current controlled oscillator in accordance with the reference signal. A plurality of different reference voltages are then supplied to one input of each of a plurality of differential amplifiers as the voltage/current converter, an output voltage formed by the loop filter is supplied to the other input of each of the plurality of differential amplifiers, and output currents of the plurality of differential amplifiers are composed by a first current mirror path to form the first current. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005073124(A) 申请公布日期 2005.03.17
申请号 JP20030302889 申请日期 2003.08.27
申请人 RENESAS TECHNOLOGY CORP 发明人 OTA MORIYOSHI;KATSUSHIMA AKIO;NOJI MASAHIRO
分类号 H03L7/093 主分类号 H03L7/093
代理机构 代理人
主权项
地址