发明名称 METHOD FOR FORMING VIA-HOLE
摘要 PROBLEM TO BE SOLVED: To provide a method for forming a via-hole which can form directly a wiring pattern on an end face of the via-hole formed by filling a metal in a through hole formed on a substrate made of an insulating material by plating. SOLUTION: The method for forming the via-hole includes a step of forming a plating metal layer 16 of a predetermined thickness on the front surface of the substrate 10 while filling the metal in the through hole 12 formed on the substrate 10 made of the insulating material by plating, a step of irradiating a plurality of positions of the plating metal layer 16 forming the vicinity of the peripheral edge of a dimple 20 formed on the part of the plating metal layer 16 corresponding to an opening of the through hole 12 with a YAG laser in a spot manner when the via-hole penetrating the substrate 10 is formed, and a step of filling the part of the plating metal layer 16 with a molten metal which carries out melting. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005072235(A) 申请公布日期 2005.03.17
申请号 JP20030299706 申请日期 2003.08.25
申请人 SHINKO ELECTRIC IND CO LTD 发明人 MASHINO NAOHIRO
分类号 H05K3/40;H05K3/00;H05K3/10;H05K3/22;H05K3/42;H05K3/46;(IPC1-7):H05K3/40 主分类号 H05K3/40
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