发明名称 Fast-path implementation for an uplink double tagging engine
摘要 A semi-conductor component test procedure, as well as a system for testing semi-conductor components. The invention relates to a semi-conductor component test procedure, as well as a system for testing semi-conductor components (3a, 3b, 3c, 3d), by means of a first and a second test apparatus (6a, 6b), whereby the first test apparatus (6a) is arranged and installed such that a time-discrete semi-conductor component test is performed by it on a particular semi-conductor component (3a), and whereby the second test apparatus (6a) is arranged and installed such that a separate, time-continuous semi-conductor component test is performed by it on the same semi-conductor component (3a).
申请公布号 US2005058077(A1) 申请公布日期 2005.03.17
申请号 US20040878677 申请日期 2004.06.29
申请人 INFINEON TECHNOLOGIES AG 发明人 MAYR ROMAN
分类号 G01R31/3167;G01R31/317;G01R31/319;G11C29/00;G11C29/50;(IPC1-7):H04L1/00 主分类号 G01R31/3167
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