发明名称 BUS CLOCK FREQUENCY MANAGEMENT BASED ON BAND WIDTH CHARACTERISTICS OF DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To control a clock speed so as to optimize performance of a device within power/heat budgets of a system. <P>SOLUTION: Frequency managers (158, 180, 200) automatically select (408, 506, 708, 810, 812) a clock frequency to each of devices (146 to 156, 106 to 108) or buses (110 to 118, 124) in the system or a plurality of devices or buses based various factors and purposes. For those factor and purposes, the optimization of the performance of the device within the power/heat budgets of the system is included. Therefore, the frequency managers are able to control (410, 508, 710, 814) circuits (120, 182, 212) which generate and provide a clock signal having a selected frequency(possibly, two or more) to those devices or buses. For example, it is possible to select the clock frequency higher than a frequency to be used by a fully mounted system in this system where devices are not necessarily fully mounted. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005071367(A) 申请公布日期 2005.03.17
申请号 JP20040241250 申请日期 2004.08.20
申请人 HEWLETT-PACKARD DEVELOPMENT CO LP 发明人 BARR ANDREW H;ESPINOZA-IBARRA RICARDO;SOMERVILL KEVIN
分类号 G06F1/06;G06F1/08;G06F1/32;(IPC1-7):G06F1/06 主分类号 G06F1/06
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