发明名称 |
Nonvolatile semiconductor memory cell matrix, a mehtod for operating the same, monolithic integrated circuits and systems |
摘要 |
A nonvolatile semiconductor memory includes a plurality of word lines WL; a plurality of bit lines BL; memory cell transistors having a charge storage layer arranged in the column whose charge storage state is controlled by one of the word lines; memory cell transistor rows MSGm, MSGn functioning as select gate lines by injecting a charge into the charge storage layer of a memory cell transistor to form an enhancement mode transistor. Any one of a first select gate transistor or a second transistor, or both may be formed by a memory cell transistor functioning as a select gate transistor.
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申请公布号 |
US2005056869(A1) |
申请公布日期 |
2005.03.17 |
申请号 |
US20040903015 |
申请日期 |
2004.08.02 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
ICHIGE MASAYUKI;ARAI FUMITAKA;SUGIMAE KIKUKO |
分类号 |
G11C16/06;G11C11/00;G11C16/02;G11C16/04;G11C16/08;G11C16/10;G11C16/16;H01L21/8246;H01L21/8247;H01L27/00;H01L27/10;H01L27/115;H01L29/74;H01L29/788;H01L29/792;(IPC1-7):H01L29/74 |
主分类号 |
G11C16/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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