Interface for a UART-based bus system

摘要

The interface couples a single wire bus (4) user (3A) to the universal asynchronous receiver/transmitter (UART)-based bus system (1). A data output (10A) transmits a first, binary data signal (Y3) via the single wire bus. Data (Y2) received at an input (11A) is derived from data signals received via the bus (4) and/or from the echo signal (Y1) derived from the first data signal (Y2). A comparator (22A) in hardware, compares the data signals (Y2, Y3), and detects any conflict between several users (3A-3D) accessing the bus (4) and/or a short circuit of the bus (4). In this case it delivers an interrupt signal (Y6) received at an interrupt input (12A). An independent claim is included for the corresponding method.