发明名称 INTERFACE DEVICE AND METHOD FOR PROCESSING OF BITSTREAM DATA
摘要 An interface device and a method for processing bit stream data are provided to bring successive byte data including variable bit data without delay and to reduce load of a processor in decoding bit stream using a variable length bit code. A memory continuously receives byte data from a transmitting side and stores the received byte data at the corresponding data area. An address decoder(110) sequentially receives byte addresses for reading the successive byte data for decoding the byte addresses. A hardware logic part(120) sequentially reads the byte data stored at the data area of the memory corresponding to the decoded byte addresses and aligns the byte data in order. A barrel shifter(130) receives the aligned byte data and bit addresses for bit-interfacing for outputting wanted bit data as byte-aligned data.
申请公布号 KR20050026810(A) 申请公布日期 2005.03.16
申请号 KR20030063422 申请日期 2003.09.09
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 JANG, SEOCK WOO
分类号 H04N7/12;(IPC1-7):H04N7/12 主分类号 H04N7/12
代理机构 代理人
主权项
地址