发明名称 |
Semiconductor integrated circuit device and its manufacturing method |
摘要 |
A semiconductor wafer which has finished formation of a relocating wiring layer thereon is stored and after determination of a design, solder bumps are formed over bump lands (one end of the relocating wiring layer) in accordance with a pattern which differs with a design, whereby a function or characteristic depending on the design is selected. The semiconductor wafer is then cut into a plurality of semiconductor chips, whereby a wafer level CSP is available. |
申请公布号 |
US6867123(B2) |
申请公布日期 |
2005.03.15 |
申请号 |
US20030250939 |
申请日期 |
2003.07.09 |
申请人 |
RENESAS TECHNOLOGY CORP. |
发明人 |
KATAGIRI MITSUAKI;SHIRAI YUJI;NISHI KUNIHIKO;OHNISHI TAKEHIRO |
分类号 |
H01L23/31;H01L23/485;H01L23/525;H01L27/02;H01L27/105;(IPC1-7):H01L21/44 |
主分类号 |
H01L23/31 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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