发明名称 Method for fabricating an integrated semiconductor circuit
摘要 A method for fabricating a semiconductor circuit uses a computer program to compute a circuit diagram that is made up of a large number of surface cells, each having a uniform height. Space-saving layouts require a uniform cell height for all the surface cells. The height is conventionally prescribed by a computer file containing standardized dimensions for a large number of surface cells. Accordingly, such surface cells as are required for a specific semiconductor circuit that is to be fabricated are selected, and the selection is used to compute a circuit-specific uniform cell height. The height is less than the height prescribed by the computer file and results in surface area being saved on the semiconductor chip.
申请公布号 US6868530(B2) 申请公布日期 2005.03.15
申请号 US20020310397 申请日期 2002.12.05
申请人 INFINEON TECHNOLOGIES AG 发明人 WAGNER MICHAEL;KEINER KLAUS
分类号 G06F17/50;H01L27/118;(IPC1-7):G06F17/50 主分类号 G06F17/50
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