METHOD OF FORMING GATE ELECTRODE IN SEMICONDUCTOR DEVICES

摘要

A method of forming a gate electrode of a flash memory device is provided to secure CD(Critical Dimension) of the gate electrode by controlling uniformly the thickness of a gate spacer using a second polysilicon layer with a predetermined doping concentration. A tunnel oxide layer(12) and an undoped first polysilicon layer(14) are sequentially formed on a semiconductor substrate(10). A second polysilicon layer(16) with a doping concentration range of 1.0 to 1.7E20 atoms/cc is formed on the undoped first polysilicon layer. A dielectric film(18) and a third polysilicon layer(20) are formed thereon. A floating gate electrode pattern, a dielectric pattern and a control gate electrode pattern are formed by patterning selectively the resultant structure. A spacer(26) is formed at both sidewalls of the gate electrode patterns by using oxidation.